Contents	5
	Chapter 1: Conventional Test Methods	6
	1.1 Introduction	6
	1.2 The Limitations of Conventional Methods	8
	1.2.1 Shortage of Extra I/O Pads for Test Purposes	8
	1.2.2 Noise and Signal Distortions Through Test Interface	10
	1.2.3 Limitations in Tester Technologies and Test Methods	11
	1.2.4 Uncertainty in Timing Synchronization Across the Test Interface	11
	1.2.5 High Cost	11
	1.2.6 Other Limitations	11
	References	12
	Chapter 2: Testability Design	13
	2.1 Introduction	13
	2.2 Ad Hoc Testability Approaches	14
	2.2.1 Adding Test Points	14
	2.2.2 Partitioning	14
	2.2.3 Other Ad Hoc Practices	15
	2.3 Scan-Based Approaches	15
	2.4 Pseudo-random Stimulus Generation and Test Response Compaction	16
	2.4.1 Overheads	16
	2.4.2 Reliability of Pseudo-random Pattern Testing	17
	2.5 Limitations of In-System Testability Design	18
	2.5.1 Hardware Overhead	18
	2.5.2 Test Interface	18
	2.5.3 Limitations in Diagnosis	18
	2.5.4 Delay	19
	References	19
	Chapter 3: Other Techniques Based on the Contacting Probe	20
	3.1 IDDQ and IDDT Testing	20
	3.2 Photoconductive Sampling Probe (PC Probe)	22
	3.2.1 Review of Photoconductive Pulse Generation and Sampling Theory	22
	3.3 Freely Positionable PC Sampling Probe	25
	References	26
	Chapter 4: Contactless Testing	28
	4.1 Introduction	28
	4.2 Photoexcitation Probe Techniques	30
	4.2.1 Optical Beam-Induced Current Technique	30
	4.2.2 Light-Induced Voltage Alteration (LIVA) Method	32
	4.3 Advantages and Disadvantages of Photoexcitation Probe Techniques	32
	4.4 Optical Beam-Induced Resistance Change (OBIRC) Technique	33
	References	34
	Chapter 5: Electron Beam and Photoemission Probing	35
	5.1 Electron Beam Method	35
	5.2 Advantages and Disadvantages of EBT	39
	5.3 The Photoemissive Probe	40
	References	43
	Chapter 6: Electro-Optic Sampling and Charge-Density Probe	44
	6.1 Electro-Optic Sampling	44
	6.1.1 External Electro-Optic Probing	45
	6.1.2 Internal Electro-Optic Probing	48
	6.1.3 External Vs. Internal Electro-Optic Probing	49
	6.2 Charge-Density Probing	50
	References	55
	Chapter 7: Electric Force Microscope, Capacitive Coupling, and Scanning Magnetoresistive Probe	56
	7.1 Electric Force Microscope	56
	7.2 Capacitive Coupling Method	58
	7.3 Scanning Magnetoresistive Probe	59
	References	60
	Chapter 8: Probing Techniques Based on Light Emission from Chip	61
	8.1 Introduction	61
	8.2 Dynamic Internal Testing of CMOS Using Hot-Carrier Luminescence	63
	8.3 Testing Method Based on Light Emission from Off-State Leakage Current (LEOSCL)	64
	8.4 All-Silicon Optical Contactless Testing of Integrated Circuits	65
	References	66
	Chapter 9: All-Silicon Optical Technology for Contactless Testing of Integrated Circuits	67
	9.1 Introduction	67
	9.2 Silicon LED Theory	69
	9.3 Silicon LED Structure	71
	9.4 Design Considerations and Feasibility	72
	9.4.1 Calculating the Optical Power of the Silicon Light-­Emitting Structure	72
	9.4.2 The Transmitter or LED Driver Circuit	73
	9.5 Experimental Design and Results	74
	9.5.1 Transmission of Input Stimulus Data from Optical Test Head to Chip (DUT)	76
	9.5.2 Transmission of Chip Outputs from DUT to Optical Test Head for Data Extraction	77
	9.5.3 The Simultaneous Transmission of Data in Both Directions	79
	9.6 Conclusion	81
	References	82
	Chapter 10: Comparison of Contactless Testing Methodologies	84
	10.1 Introduction	84
	References	91